AMD
GPUDatacenterReleased Nov 16, 2020

AMD Instinct MI100

32 GB HBM2 · 4096-bit · 7,680 cores

AMD's first accelerator built on the CDNA architecture, launched in November 2020 as a GPU designed only for HPC and AI rather than graphics. AMD introduced it as the first x86 server GPU to exceed 10 TFLOPS of double-precision performance, and it debuted the Matrix Cores used for mixed-precision AI workloads. The passively cooled, dual-slot PCIe card uses Infinity Fabric links to connect up to four GPUs in a single server.

General

Manufacturer
AMD
Model
Instinct MI100
Segment
Datacenter
GPU chip
Arcturus
Architecture
CDNA
Release date
Nov 16, 2020

Memory

Memory size
32 GB
Memory type
HBM2
Bus width
4096-bit
Bandwidth
1,228.8 GB/s
Memory clock
1,200 MHz

Clocks & silicon

GPU clock
—
Boost clock
1,502 MHz
Shader units
7,680 Stream Processors (120 CU)
Tensor / AI cores
—
RT cores
—
Transistors
25.6 billion
Technology (nm)
7 nm
TSMC N7
TDP / TBP
300 W

Interface & APIs

Bus interface
PCIe 4.0 x16
SLI / multi-GPU
AMD Infinity Fabric Link (3 links, 92 GB/s peak)
DirectX
N/A (compute only)
OpenGL
N/A (compute only)
Vulkan
N/A
Other APIs
ROCm, OpenCL

AI support

Precisions
FP8FP16BF16INT8INT4TF32FP64
AI accelerator
Matrix Cores (CDNA)
Peak AI TOPS
92.3 TOPS
Notes
Matrix Cores accelerate FP16 (184.6 TFLOPS), bfloat16 (92.3 TFLOPS), INT8 and INT4 (92.3 TOPS each). FP64 runs at half the FP32 rate (11.5 vs 23.1 TFLOPS), with full-chip ECC. No FP8 or TF32 support, which arrived with later CDNA generations.
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128 GB HBM2e · 8192-bit · 13,312 cores

Released
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